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  advanced communications & sensing rev5 4 th august 2011 ? 2011 semtech corp. www.semtech.com 1 SX8662 capacitive button matrix (up to 3 6) controller with individual led drivers and buzzer output g eneral d escription the SX8662 is an ultra low power, fully integrated 12-channel solution for capacitive touch-button matrix applications (up to 36 keys). unlike many capacitive touch solutions, the SX8662 features dedicated capacitive sense inputs (that requires no external components) in addition to 8 general purpose i/o ports (gpio) which can be used to drive up to 36 matrix leds (i.e. one per key). each of th e on-chip gpio/led driver is equipped with independent pwm source for enhanced visual effect such as dimming, and breathing. the SX8662 includes a capacitive 10 bit adc analog interface with automatic compensation up to 100pf. the high resolution capacitive sensing supports a wide variety of touch pad sizes and shapes and allows capacitive buttons to be created using thick overlay materials (up to 5mm) for an extremely robust and esd immune system design. the SX8662 incorporates a versatile firmware that was specially designed to simplify capacitive touch solution design and offers reduced time-to-market. integrated multi-time programmable memory provides the ultimate flexibility to modify key fir mware parameters (gain, threshold, scan period, auto offs et compensation) in the field without the need for new firmware development. the SX8662 supports the 400 khz i2c serial bus data protocol and includes a field programmable slave address. the tiny 5mm x 5mm footprint makes it an ideal solution for portable, battery powered applications where power and density are at a premium. t ypical a pplication circuit SX8662 cap2 cap3 cap4 cap5 cap6 cap8 cap7 cap9 gnd gpio5 gpio4 gpio3 gpio2 gpio1 gpio0 cap1 cap0 vana resetb gnd gpio7 vdig gpio6 cap10 cap11 cn cp vdd scl intb sda analog sensor interface micro processor ram rom nvm i2c gpio controller power management clock generation rc pwm led controller bottom plate host 36 capacitive matrix buttons 36 matrix leds cap4 cap11 cap10 cap8 cap9 cap0 cap7 cap6 cap5 cap3 cap1 cap2 buzzer k ey p roduct f eatures  complete capacitive touch-button solution o up to 36 matrix buttons o up to 36 leds control for individual visual feedback with auto lightening o configurable single or continuous fading mode o 256 steps pwm linear and logarithmic control  high resolution capacitive sensing o up to 100pf of offset cap. compensation at full sensitivity o capable of sensing up thru 5mm thick overlay mater ials  support of buzzer for audible feedback  user-selectable button reporting configuration  extremely low power o 8ua (typ) in sleep mode o 100ua (typ) in doze mode (195ms) o 460ua (typ) in active mode (30ms)  programmable scanning period from 15ms to several se conds  auto offset compensation o eliminates false triggers due to environmental fact ors (temperature, humidity) o initiated on power-up and configurable intervals  multi-time in-field programmable firmware parameters for ultimate flexibility o on-chip user programmable memory for fast, self contained start-up  no external components per sensor input  internal clock requires no external components  differential sensor sampling for reduced emi  optional 400 khz i2c interface with programmable addr ess  -40c to +85c operation a pplications  home automation  white goods  printers  notebook/netbook/portable/handheld computers  consumer products, instrumentation, automotive  mechanical button replacement o rdering i nformation part number temperature range package SX8662i08awltrt 1 -40c to +85c lead free mlpq -w32 1 3000 units/reel * this device is rohs/weee compliant and halogen fr ee
advanced communications & sensing rev5 4 th august 2011 ? 2011 semtech corp. www.semtech.com 2 SX8662 capacitive button matrix (up to 36) controller with individual led drivers and buzzer output table of contents g eneral d escription ................................................... ................................................... .................. 1 t ypical a pplication circuit ................................................... ................................................... ...... 1 k ey p roduct f eatures ................................................... ................................................... ............... 1 a pplications ................................................... ................................................... ................................. 1 o rdering i nformation ................................................... ................................................... ................ 1 1 g eneral d escription ................................................... ................................................... ......... 4 1.1 pin diagram 4 1.2 marking information 4 1.3 pin description 5 1.4 simplified block diagram 6 1.5 acronyms 6 2 e lectrical c haracteristics ................................................... .............................................. 7 2.1 absolute maximum ratings 7 2.2 recommended operating conditions 7 2.3 thermal characteristics 7 2.4 electrical specifications 8 3 f unctional description ................................................... ................................................... .. 10 3.1 introduction 10 3.1.1 general 10 3.1.2 parameters 10 3.1.3 configuration 10 3.2 scan period 10 3.3 operation modes 11 3.4 sensors on the pcb 12 3.4.1 matrix keys/buttons (mk) 12 3.4.2 priority key/button (pk) 12 3.4.3 schematics requirements 12 3.5 button information (mk and pk) 14 3.6 analog sensing interface 14 3.7 offset compensation 16 3.8 processing 17 3.9 configuration 17 3.10 power management 19 3.11 clock circuitry 19 3.12 i2c interface 19 3.13 interrupt 20 3.13.1 power up 20 3.13.2 assertion 20 3.13.3 clearing 20 3.13.4 example 21 3.14 reset 21 3.14.1 power up 21 3.14.2 resetb 22
advanced communications & sensing rev5 4 th august 2011 ? 2011 semtech corp. www.semtech.com 3 SX8662 capacitive button matrix (up to 36) controller with individual led drivers and buzzer output 3.14.3 software reset 22 3.15 general purpose input and outputs 23 3.15.1 gpo 23 3.15.2 fading modes 25 3.15.3 intensity index vs pwm pulse width 26 3.15.4 tri-state multiplexing (tsm) 27 4 p in descriptions ................................................... ................................................... ............... 28 4.1 introduction 28 4.2 asi pins 28 4.3 host interface pins 29 4.4 power management pins 32 4.5 general purpose io pins 33 5 d etailed c onfiguration descriptions ................................................... ........................... 34 5.1 introduction 34 5.2 general parameters 37 5.3 capacitive sensors parameters 38 5.4 buttons (mk and pk) parameters 40 5.5 buzzer parameters 43 5.6 gpio parameters 44 6 i2c i nterface ................................................... ................................................... ..................... 47 6.1 i2c write 47 6.2 i2c read 48 6.3 i2c registers overview 49 6.4 status registers 50 6.5 control registers 52 6.6 spm gateway registers 53 6.6.1 spm write sequence 54 6.6.2 spm read sequence 55 6.7 nvm burn 56 7 a pplication i nformation ................................................... ................................................... 57 8 r eferences ................................................... ................................................... ....................... 58 9 p ackaging i nformation ................................................... ................................................... .. 59 9.1 package outline drawing 59 9.2 land pattern 59
advanced communications & sensing rev5 4 th august 2011 ? 2011 semtech corp. www.semtech.com 4 SX8662 capacitive button matrix (up to 36) controller with individual led drivers and buzzer output 1 g eneral d escription 1.1 pin diagram SX8662 topview 1 2 3 4 5 6 7 8 24 23 22 21 20 19 18 17 9 10 11 12 13 14 15 16 25 26 27 28 29 30 31 32 bottomgroundpad cap2 cap3 cap4 cap5 cap6 cap8 cap7 cap9 gnd gpio5 gpio4 gpio3 gpio2 gpio1 gnd gpio0 cap1 cap0 vana resetb gnd gpio7 vdig gpio6 cap10 cap11 cncp vdd scl intb sda figure 1 pinout diagram 1.2 marking information asx08 yyww xxxxxx r08 yyww =datecode xxxxxx =semtechlotnumber r08 =semtechcode figure 2 marking information
advanced communications & sensing rev5 4 th august 2011 ? 2011 semtech corp. www.semtech.com 5 SX8662 capacitive button matrix (up to 36) controller with individual led drivers and buzzer output 1.3 pin description number name type description 1 cap2 analog capacitive sensor 2 2 cap3 analog capacitive sensor 3 3 cap4 analog capacitive sensor 4 4 cap5 analog capacitive sensor 5 5 cap6 analog capacitive sensor 6 6 cap7 analog capacitive sensor 7 7 cap8 analog capacitive sensor 8 8 cap9 analog capacitive sensor 9 9 cap10 analog capacitive sensor 10 10 cap11 analog capacitive sensor 11 11 cn analog integration capacitor, negative termina l (1nf between cn and cp) 12 cp analog integration capacitor, positive termina l (1nf between cn and cp) 13 vdd power main input power supply 14 intb digital output interrupt, active low, requi res pull up resistor (on host or external) 15 scl digital input i2c clock, requires pull up res istor (on host or external) 16 sda digital input/output i2c data, requires pull up resistor (on host or external) 17 gpio0 digital input/output general purpose input/ output 0 18 gpio1 digital input/output general purpose input/ output 1 19 gnd ground ground 20 gpio2 digital input/output general purpose input/ output 2 21 gpio3 digital input/output general purpose input/ output 3 22 gpio4 digital input/output general purpose input/ output 4 23 gpio5 digital input/output general purpose input/ output 5 24 gnd ground ground 25 gpio6 digital input/output general purpose input/ output 6 26 gpio7 digital input/output general purpose input/ output 7 27 vdig analog digital core decoupling, connect to a 100nf decoupling capacitor 28 gnd ground ground 29 resetb digital input active low reset. connect to vdd if not used. 30 vana analog analog core decoupling, connect to a 100 nf decoupling capacitor 31 cap0 analog capacitive sensor 0 32 cap1 analog capacitive sensor 1 bottom plate gnd ground exposed pad connect to ground table 1 pin description
advanced communications & sensing rev5 4 th august 2011 ? 2011 semtech corp. www.semtech.com 6 SX8662 capacitive button matrix (up to 36) controller with individual led drivers and buzzer output 1.4 simplified block diagram the simplified block diagram of the SX8662 is illus trated in figure 3. SX8662 cap2 cap3 cap4 cap5 cap6 cap8 cap7 cap9 gnd gpio5 gpio4 gpio3 gpio2 gpio1 gnd gpio0 cap1 cap0 vana resetb gnd gpio7 vdig gpio6 cap10 cap11 cn cp vdd scl intb sda analog sensor interface micro processor ram rom i2c gpio controller powermanagement clock generation rc pwm led controller bottomplate nvm figure 3 simplified block diagram of the SX8662 1.5 acronyms asi analog sensor interface dcv digital compensation value gpo general purpose output gpp general purpose pwm mtp multiple time programmable nvm non volatile memory pwm pulse width modulation qsm quick start memory spm shadow parameter memory spo special purpose output mk matrix key pk priority key ps proximity sensor tsm tri-state multiplexing
advanced communications & sensing rev5 4 th august 2011 ? 2011 semtech corp. www.semtech.com 7 SX8662 capacitive button matrix (up to 36) controller with individual led drivers and buzzer output 2 e lectrical c haracteristics 2.1 absolute maximum ratings stresses above the values listed in absolute maximum ratings may cause permanent damage to the device. this is a stress rating only and functional operati on of the device at these, or any other conditions beyond the recommended operating conditions, is not implied. exposure to a bsolute maximum rating conditions for extended peri ods may affect device reliability . parameter symbol min. max. unit supply voltage vdd -0.5 3.9 v input voltage (non-supply pins) v in -0.5 3.9 v input current (non-supply pins) i in 10 ma operating junction temperature t jct 125 c reflow temperature t re 260 c storage temperature t stor -50 150 c esd hbm (human body model) (i) esd hbm 3 kv latchup (ii) i lu 100 ma table 2 absolute maximum ratings (i) tested to jedec standard jesd22-a114 (ii) tested to jedec standard jesd78 2.2 recommended operating conditions parameter symbol min. max. unit supply voltage vdd 2.7 3.6 v supply voltage drop (iii, iv, v) vdd drop 100 mv supply voltage for nvm programming vdd 3.0 3.6 v ambient temperature range t a -40 85 c table 3 recommended operating conditions (iii) performance for 2.6v < vdd < 2.7v might be degrad ed. (iv) operation is not guaranteed below 2.6v. should vd d briefly drop below this minimum value, then the sx 8662 may require; - a hardware reset issued by the host using the resetb pin - a software reset issued by the host using the i2c interface (v) in the event the host processor is reset or und ergoes a power off/on cycle, it is recommended that the host also resets the SX8662 and assures that parameters are re-writte n into the spm (should these differ to the parameters held in nvm). 2.3 thermal characteristics parameter symbol min. max. unit thermal resistance - junction to ambient (vi) q ja 25 c/w table 4 thermal characteristics ( vi) static airflow
advanced communications & sensing rev5 4 th august 2011 ? 2011 semtech corp. www.semtech.com 8 SX8662 capacitive button matrix (up to 36) controller with individual led drivers and buzzer output 2.4 electrical specifications all values are valid within the operating condition s unless otherwise specified. parameter symbol conditions min. typ. max. unit current consumption active mode, average i op,active 30ms scan period, 12 sensors enabled, minimum sensitivity 460 ua doze mode, average i op,doze 195ms scan period, 12 sensors enabled, minimum sensitivity 100 ua sleep i op,sleep i2c listening, sensors disabled 8 17 ua resetb, scl, sda input logic high v ih 0.7*vdd vdd + 0.3 v input logic low v il vss applied to gnd pins vss - 0.3 0.8 v input leakage current l i cmos input 1 ua pull up resistor r pu when enabled 660 k w pull down resistor r pd when enabled 660 k w gpio set as output, intb, sda output logic high v oh i oh <4ma vdd-0.4 v output logic low v ol i ol,gpio <12ma i ol,sda,intb <4ma 0.4 v start-up power up time t por time between rising edge vdd and rising intb 400 ms resetb resetb pulse width t res 50 ns recommended external components capacitor between vdig, gnd c vdig type 0402, tolerance +/-50% 100 nf capacitor between vana, gnd c vana type 0402, tolerance +/-50% 100 nf capacitor between cp, cn c int type 0402, cog, tolerance +/-5% 1 nf capacitor between vdd, gnd c vdd type 0402, tolerance +/-50% 100 nf table 5 electrical specifications
advanced communications & sensing rev5 4 th august 2011 ? 2011 semtech corp. www.semtech.com 9 SX8662 capacitive button matrix (up to 36) controller with individual led drivers and buzzer output parameter symbol conditions min. typ. max. unit i2c timing specifications (i) scl clock frequency f scl 400 khz scl low period t low 1.3 us scl high period t high 0.6 us data setup time t su;dat 100 ns data hold time t hd;dat 0 ns repeated start setup time t su;sta 0.6 us start condition hold time t hd;sta 0.6 us stop condition setup time t su;sto 0.6 us bus free time between stop and start t buf 500 us input glitch suppression t sp 50 ns table 6 i2c timing specification notes: (i) all timing specifications, figure 4 and figure 5, refer to voltage levels (v il , v ih , v ol ) defined in table 5. the interface complies with slave f/s mode as descr ibed by nxp: i2c-bus specification, rev. 03 - 19 j une 2007 figure 4 i2c start and stop timing figure 5 i2c data timing
advanced communications & sensing rev5 4 th august 2011 ? 2011 semtech corp. www.semtech.com 10 SX8662 capacitive button matrix (up to 36) controller with individual led drivers and buzzer output 3 f unctional description 3.1 introduction 3.1.1 general the SX8662 is intended to be used in applications w hich require capacitive sensors covered by isolatin g overlay material. a finger approaching the capacitive senso rs will change the charge that can be loaded on the sensors. the SX8662 measures the change of charge and conver ts that into digital values (ticks). the larger the charge on the sensors, the larger the number of ticks will be . the charge to ticks conversion is done by the sx8 662 analog sensor interface (asi). the ticks are further processed by the SX8662 and c onverted in a high level, easy to use information f or the users host. the information between SX8662 and the host is pass ed through the i2c interface with an additional int errupt signal indicating that the SX8662 has new informati on. for buttons this information is simply touched or released. user feedback, done through the SX8662s gpios, can be visual via leds and/or audio via a buzzer. 3.1.2 parameters the SX8662 has many low level built-in, fixed algor ithms and procedures. to allow a lot of freedom for the user and adapt the SX8662 for different applications the se algorithms and procedures can be configured with a large set of parameters which will be described in the fo llowing sections. sensitivity and detection thresholds of the sensors are part of these parameters. assuming that overla y material and sensors areas are identical then the sensitivit ies and thresholds will be the same for each sensor . in case sensors are not of the same size then sensitivities or thresholds might be chosen individually per sen sor. so a smaller size sensor can have a larger sensitiv ity while a big size sensor may have the lower sens itivity. 3.1.3 configuration during a development phase the parameters can be de termined and fine tuned by the users and downloaded over the i2c in a dynamic way. the parameter set ca n be downloaded over the i2c by the host each time the SX8662 boots up. this allows a flexible way of sett ing the parameters at the expense of i2c occupation . in case the parameters are frozen they can be progr ammed in multiple time programmable (mtp) non volat ile memory (nvm) on the SX8662. the programming needs t o be done once (over the i2c). the SX8662 will then boot up from the nvm and additional parameters from the host are not required anymore. in case the host desires to overwrite the boot-up n vm parameters (partly or even complete) this can be done by additional i2c communications. 3.2 scan period the basic operation scan period of the SX8662 sensi ng interface can be split into three periods over t ime. in the first period (sensing) the SX8662 is sensing all enabled cap inputs, from cap0 towards cap11. in the second period (processing) the SX8662 proces ses the sensor data, verifies and updates the gpio and the i2c. in the third period (timer) the SX8662 is set in a low power mode and waits until a new cycle starts. figure 6 shows the different SX8662 periods over ti me.
advanced communications & sensing rev5 4 th august 2011 ? 2011 semtech corp. www.semtech.com 11 SX8662 capacitive button matrix (up to 36) controller with individual led drivers and buzzer output figure 6 scan period the scan period determines the minimum reaction tim e of the SX8662. the scan period can be configured by the host from 15ms to values larger than a second. the reaction time is defined as the interval betwee n a touch on the sensor and the moment that the sx8 662 generates the interrupt on the intb pin. the shorte r the scan period the faster the reaction time will be. very low power consumptions can be obtained by sett ing very long scan periods with the expense of havi ng longer reaction times. all external events like gpio, i2c and the interrup t are updated in the processing period, so once eve ry scan period. 3.3 operation modes the SX8662 has 3 operation modes. the main differen ce is found in the reaction time (corresponding to the scan period) and power consumption. active mode offers fast scan periods. the typical r eaction time is 30ms. all enabled sensors are scann ed and information data is processed within this interval. doze mode increases the scan period time which incr eases the reaction time to 195ms typical and at the same time reduces the operating current. sleep mode turns the SX8662 off, except for the i2c peripheral, minimizing operating current while mai ntaining the power supplies. in sleep mode the SX8662 does n ot do any sensor scanning. the sleep mode will be e xited by any i2c access. the user can specify other scan periods for the act ive and doze mode and decide for other compromises between reaction time and power consumption. in most applications the reaction time needs to be fast when fingers are present, but can be slow when no person uses the application. in case the SX8662 is not use d for a specific time it will go from active mode i nto doze mode and power will be saved. this time-out is dete rmined by the passive timer which can be configured by the user or turned off if not required. to leave doze mode and enter active mode this can b e done by a simple touch on any button. the host can decide to force the operating mode by issuing commands over the i2c (using register compopmode) and take fully control of the SX8662. t he diagram in figure 7 shows the available operatio n modes and the possible transitions.
advanced communications & sensing rev5 4 th august 2011 ? 2011 semtech corp. www.semtech.com 12 SX8662 capacitive button matrix (up to 36) controller with individual led drivers and buzzer output figure 7 operation modes 3.4 sensors on the pcb 3.4.1 matrix keys/buttons (mk) in opposition to most of the other semtech capaciti ve sensing products where 1 button = 1 sensor (cap0cap11)., the SX8662 requires sensors to be ro uted in matrix and each button is formed by the intersection/concatenation of two sensors areas. th e buttons are covered by isolating overlay material (typically 1mm...3mm). the area of a button is typically one s quare centimetre which corresponds about to the are a of a finger touching the overlay material. figure 8 matrix buttons layout/connections (red = top; brown = inner1; blue = inner2) important: please note that while the matrix structure allows increasing dramatically the potential maximum number of buttons (up to 36 with only 12 sensors) i t also limits the operation to max one matrix butto n reported at a time (ie single button touch operation). when sev eral matrix buttons are touched only the first one is reported. 3.4.2 priority key/button (pk) when the priority key is enabled in btncfg[6], cap1 1 can be routed outside the matrix to a separate st andard button sensor. matrix size is then reduced to 6x5 k eys (cap0cap10). priority key operation/reporting is independent from the matrix and can be used for any high priority key (power, reset, etc) or multi- touch function (shift, alt, etc). 3.4.3 schematics requirements for each pk combination, a specific schematic must be followed on the board as illustrated in figure b elow.
advanced communications & sensing rev5 4 th august 2011 ? 2011 semtech corp. www.semtech.com 13 SX8662 capacitive button matrix (up to 36) controller with individual led drivers and buzzer output cap0 cap10 cap4 cap5 cap8 cap11 pk = off cap3 cap2 cap1 cap6 cap9 cap7 mk 1 mk 2 mk 5 mk 10 mk 17 mk 26 mk 4 mk 3 mk 6 mk 11 mk 18 mk 27 mk 8 mk 7 mk 12 mk 19 mk 28 mk 16 mk 15 mk 14 mk 13 mk 20 mk 29 mk 25 mk 24 mk 23 mk 22 mk 21 mk 30 mk 36 mk 35 mk 34 mk 33 mk 32 mk 31 mk 9 cap0 cap10 cap4 cap5 cap8 pk = on (cap11) cap3 cap2 cap1 cap6 cap9 cap7 mk 1 mk 2 mk 5 mk 10 mk 17 mk 26 mk 4 mk 3 mk 6 mk 11 mk 18 mk 27 mk 8 mk 7 mk 12 mk 19 mk 28 mk 16 mk 15 mk 14 mk 13 mk 20 mk 29 mk 25 mk 24 mk 23 mk 22 mk 21 mk 30 mk 9 figure 9 sensors schematics requirements vs configuration
advanced communications & sensing rev5 4 th august 2011 ? 2011 semtech corp. www.semtech.com 14 SX8662 capacitive button matrix (up to 36) controller with individual led drivers and buzzer output 3.5 button information (mk and pk) the touch buttons have two simple states (see figur e 10): on (touched by finger) and off (released and no finger press). figure 10 buttons a finger touch is reported as soon as the asi ticks of both sensors forming the button exceed their us er-defined threshold plus a hysteresis. a finger release is reported as soon as the asi tic ks of one at least of the sensors forming the butto n goes below its user-defined threshold minus a hysteresis. the hysteresis around the threshold avoids rapid to uch and release signalling during transients. important: please note that while the matrix structure allows increasing dramatically the potential maximum number of buttons (up to 36 with only 12 sensors) i t also limits the operation to max one matrix butto n reported at a time (ie single button touch operation). when two matrix buttons are touched only the first one is r eported. 3.6 analog sensing interface the analog sensing interface (asi) converts the cha rge on the sensors into ticks which will be further digitally processed. the basic principle of the asi will be e xplained in this section. the asi consists of a multiplexer selecting the sen sor, analog switches, a reference voltage, an adc s igma delta converter, an offset compensation dac and an extern al integration capacitor (see figure 11). figure 11 analog sensor interface to get the ticks representing the charge on a speci fic sensor the asi will execute several steps.
advanced communications & sensing rev5 4 th august 2011 ? 2011 semtech corp. www.semtech.com 15 SX8662 capacitive button matrix (up to 36) controller with individual led drivers and buzzer output the charge on a sensor cap (e.g cap0) will be accum ulated multiple times on the external integration c apacitor, cint. this results in an increasing voltage on cint propo rtional to the capacitance on cap0. at this stage the offset compensation dac is enable d. the compensation dac generates a voltage proport ional to an estimation of the external capacitance. the e stimation is obtained by the offset compensation pr ocedure executed e.g. at power-up. the difference between the dac output and the charg e on cint is the desired signal. in the ideal case the difference of charge will be converted to zero tick s if no finger is present and the number of ticks b ecomes high in case a finger is present. the difference of charge on cint and the dac output will be transferred to the adc (sigma delta integr ator). after the charge transfer to the adc the steps abov e will be repeated. the larger the number the cycles are repeated the l arger the signal out of the adc with improved snr. the sensitivity is therefore directly related to the nu mber of cycles. the SX8662 allows setting the sensitivity for each sensor individually in applications which have a va riety of sensors sizes or different overlays or for fine-tun ing performances. the optimal sensitivity is depend ing heavily on the final application. if the sensitivity is too lo w the ticks will not pass the thresholds and user d etection will not be possible. in case the sensitivity is set too large, some power will be wasted and false touch informat ion may be output (i.e. for touch buttons => finger not touchi ng yet). once the asi has finished the first sensor, the tic ks are stored and the asi will start measuring the next sensor until all (enabled) sensors pins have been treated. in case some sensors are disabled then these result in lower power consumption simply because the asi is active for a shorter period and the following processing p eriod will be shorter. the ticks from the asi will then be handled by the digital processing. the asi will shut down and wait until new sensing p eriod will start.
advanced communications & sensing rev5 4 th august 2011 ? 2011 semtech corp. www.semtech.com 16 SX8662 capacitive button matrix (up to 36) controller with individual led drivers and buzzer output 3.7 offset compensation the capacitance at the cap pins is determined by an intrinsic capacitance of the integrated circuit, t he pcb traces, ground coupling and the sensor planes. this capacitance is relatively large and might become e asily some tens of pf. this parasitic capacitance will vary on ly slowly over time due to environmental changes. a finger touch is in the order of one pf. if the fi nger approaches the sensor this occurs typically fa st. the asi has the difficult task to detect and distin guish a small, fast changing capacitance, from a la rge, slow varying capacitance. this would require a very prec ise, high resolution adc and complicated, power con suming, digital processing. the SX8662 features a 16 bit dac which compensates for the large, slow varying capacitance already in front of the adc. in other words the adc converts only the d esired small signal. in the ideal world the adc wil l put out zero ticks even if the external capacitance is as h igh as 100pf. at each power-up of the SX8662 the digital compensa tion values (dcv) are estimated by the digital proc essing algorithms. the algorithm will adjust the compensat ion values such that zero ticks will be generated b y the adc. once the correct compensation values are found thes e will be stored and used to compensate each cap pi n. if the SX8662 is shut down the compensation values will be lost. at a next power-up the procedure star ts all over again. this assures that the SX8662 will operate un der any condition. powering up at e.g. different te mperatures will not change the performance of the SX8662 and t he host does not have to do anything special. the dcvs do not need to be updated if the external conditions remain stable. however if e.g. temperature changes this will influ ence the external capacitance. the adc ticks will d rift then slowly around zero values basically because of the mismatch of the compensation circuitry and the exte rnal capacitance. in case the average value of the ticks become highe r than the positive noise threshold (configurable b y user) or lower than the negative threshold (configurable by user) then the SX8662 will initiate a compensation procedure and find a new set of dcvs. compensation procedures can as well be initiated by the SX8662 on periodic intervals. even if the tick s remain within the positive and negative noise thresholds t he compensation procedure will then estimate new se ts of dcvs. finally the host can initiate a compensation proced ure by using the i2c interface. this is e.g. requir ed after the host changed the sensitivity of sensors.
advanced communications & sensing rev5 4 th august 2011 ? 2011 semtech corp. www.semtech.com 17 SX8662 capacitive button matrix (up to 36) controller with individual led drivers and buzzer output 3.8 processing the first processing step of the raw ticks, coming out of the asi, is low pass filtering to obtain an estimation of the average capacitance: tick-ave (see figure 12). this slowly varying average is important in the det ection of slowly changing environmental changes. ticks(raw) compensationdcv asi processing lowpass tickdiff tickave processing gpio controller pwmled controller i2c spm figure 12 processing the difference of the tick average and the raw tick s, tick-diff, is a good estimation of rapid changin g input capacitances. the tick-diff, tick-ave and the configuration param eters in the spm are then processed and determines the sensor information, i2c registers status and pwm control. 3.9 configuration figure 13 shows the building blocks used for config uring the SX8662. figure 13 configuration the default configuration parameters of the SX8662 are stored in the quick start memory (qsm). this configuration data is setup to a very common applic ation for the SX8662 with 8 buttons. without any pr ogramming or host interaction the SX8662 will start up in the quick start application. the qsm settings are fixed and cannot be changed by the user.
advanced communications & sensing rev5 4 th august 2011 ? 2011 semtech corp. www.semtech.com 18 SX8662 capacitive button matrix (up to 36) controller with individual led drivers and buzzer output in case the application needs different settings th an the qsm settings then the SX8662 can be setup an d/or programmed over the i2c interface. the configuration parameters of the SX8662 can be s tored in the multiple time programmable (mtp) non volatile memory (nvm). the nvm contains all those p arameters that are defined and stable for the appli cation. examples are the number of sensors enabled, sensiti vity, active and doze scan period. the details of t hese parameters are described in the next chapters. at power up the SX8662 checks if the nvm contains v alid data. in that case the configuration parameter source becomes the nvm. if the nvm is empty or non-valid t hen the configuration source becomes the qsm. in th e next step the SX8662 copies the configuration parameter source into the shadow parameter memory (spm). the SX8662 is operational and uses the configuration pa rameters of the spm. during power down or reset event the spm loses all content. it will automatically be reloaded followin g power up or at the end of the reset event. the host will interface with the SX8662 through the i2c bus and the analog output interface. the i2c of the SX8662 consists of 16 registers. som e of these i2c registers are used to read the statu s and information of the buttons. other i2c registers all ow the host to take control of the SX8662. the host can e.g. decide to change the operation mode from active mod e to doze mode or go into sleep (according figure 7 ). two additional modes allow the host to have an acce ss to the spm or indirect access to the nvm. these modes are required during development, can be used in real time or in-field programming. figure 14 shows the host spm mode. in this mode the host can decide to overwrite the spm. this is usef ul during the development phases of the application wh ere the configuration parameters are not yet fully defined and as well during the operation of the application if some parameters need small deviations from the qsm or nvm content. figure 14 host spm mode the content of the spm remains valid as long as the SX8662 is powered. after a power down the host nee ds to re-write the spm at the next power-up. figure 15 shows the host nvm mode. in this mode the host will be able to write the nvm.
advanced communications & sensing rev5 4 th august 2011 ? 2011 semtech corp. www.semtech.com 19 SX8662 capacitive button matrix (up to 36) controller with individual led drivers and buzzer output figure 15 host nvm mode the writing of the host towards the nvm is not done directly but done in 2 steps (figure 15). in the first step the host writes to the spm (as in figure 14). in the second step the host signals th e SX8662 to copy the spm content into the nvm. initially the nvm memory is empty and it is require d to determine a valid parameter set for the applic ation. this can be done during the development phase using dedi cated evaluation hardware representing the final application. this development phase uses probably i nitially the host spm mode which allows faster iter ations. once the parameter set is determined this can be wr itten to the nvm over the i2c using the 2 steps app roach by the host or a dedicated programmer for large volume s production (as described in the paragraphs 6.6 and 6.7). 3.10 power management the SX8662 uses on-chip voltage regulators which ar e controlled by the on-chip microprocessor. the reg ulators need to be stabilized with an external capacitor be tween vana and ground and between vdig and ground ( see table 5). both regulators are designed to only driv e the SX8662 internal circuitry and must not be loa ded externally. 3.11 clock circuitry the SX8662 has its own internal clock generation ci rcuitry that does not require any external componen ts. the clock circuitry is optimized for low power operatio n and is controlled by the on-chip microprocessor. the typical operating frequency of the oscillating core is 16.7 mhz from which all other lower frequencies are deri ved. 3.12 i2c interface the i2c interface allows the communication between the host and the SX8662. the i2c slave implemented on the SX8662 is complian t with the standard (100kb/s) and fast mode (400kb/ s) the default SX8662 i2c address equals 0b010 1011. a different i2c address can be programmed by the us er in the nvm.
advanced communications & sensing rev5 4 th august 2011 ? 2011 semtech corp. www.semtech.com 20 SX8662 capacitive button matrix (up to 36) controller with individual led drivers and buzzer output 3.13 interrupt 3.13.1 power up during power up the intb is kept low. once the powe r up sequence is terminated the intb is cleared autonomously. the SX8662 is then ready for operatio n. figure 16 power up vs. intb during the power on period the SX8662 stabilizes th e internal regulators, rc clocks and the firmware i nitializes all registers. during the power up the SX8662 is not accessible an d i2c communications are forbidden. the gpios set a s inputs with a pull up resistor. as soon as the intb rises the SX8662 will be ready for i2c communication. the gpios are then configure d according the parameters in the spm. the value of intb before power up depends on the in tb pull up resistor supply voltage. 3.13.2 assertion intb is updated in active or doze mode once every s can period. the intb will be asserted at the following events: if a button event occurred (touch or release if en abled). i2c register capstatkeys show the detailed status of the buttons, when actually entering active or doze mode via a h ost request (may be delayed by 1 scan period). i2c register compopmode shows the current operation mod e, once compensation procedure is completed either th rough automatic trigger or via host request (may be delayed by 1 scan period), once spm write is effective (may be delayed by 1 s can period), once nvm burn procedure is completed (may be delay ed by 1 scan period), during reset (power up, hardware resetb, software reset). 3.13.3 clearing the clearing of the intb is done as soon as the hos t performs a read to any of the SX8662 i2c register s.
advanced communications & sensing rev5 4 th august 2011 ? 2011 semtech corp. www.semtech.com 21 SX8662 capacitive button matrix (up to 36) controller with individual led drivers and buzzer output 3.13.4 example a typical example of the assertion and clearing of the intb and the i2c communication is shown in figu re 17. figure 17 interrupt and i2c when a button is touched the SX8662 will assert the interrupt (1). the host will read the SX8662 statu s information over the i2c (2) and this clears the in terrupt. if the finger releases the button the interrupt wil l be asserted (3), the host reads the status (4) wh ich clears the interrupt. in case the host will not react to an interrupt the n this will result in a missing touch. 3.14 reset the reset can be performed by 3 sources: - power up, - resetb pin, - software reset. 3.14.1 power up during power up the intb is kept low. once the powe r up sequence is terminated the intb is released autonomously. the SX8662 is then ready for operatio n. figure 18 power up vs. intb
advanced communications & sensing rev5 4 th august 2011 ? 2011 semtech corp. www.semtech.com 22 SX8662 capacitive button matrix (up to 36) controller with individual led drivers and buzzer output during the power on period the SX8662 stabilizes th e internal regulators, rc clocks and the firmware i nitializes all registers. during the power up the SX8662 is not accessible an d i2c communications are forbidden. as soon as the intb rises the SX8662 will be ready for i2c communication. 3.14.2 resetb when resetb is driven low the SX8662 will reset and start the power up sequence as soon as resetb is driven high or pulled high. in case the user does not require a hardware reset control pin then the resetb pin can be connected to vdd. figure 19 hardware reset 3.14.3 software reset to perform a software reset the host needs to write 0xde followed by 0x00 at the softreset register at address 0xb1. figure 20 software reset
advanced communications & sensing rev5 4 th august 2011 ? 2011 semtech corp. www.semtech.com 23 SX8662 capacitive button matrix (up to 36) controller with individual led drivers and buzzer output 3.15 general purpose input and outputs the SX8662 offers eight general purpose input and o utputs (gpio) pins which can be configured in any o f these modes: - gpo (general purpose output) with autoligth on/of f - spo (special purpose output). gpio7 only; in this mode the gpio can be connected to an external buzz er. the input state of the gpio is only used during the initial phase of the power up period. each of these gpio modes is described in more detai ls in the following sections. the polarity of the gpo pins is defined as in figur e below, driving an led as example. it has to be se t accordingly in spm parameter gpiopolarity. figure 21 polarity = 1/normal (a), polarity = 0/inverted (b) the pwm blocks used gpo modes are 8-bits based and clocked at 2mhz typ. hence offering 256 selectable pulse width values with a granularity of 0.5us typ. figure 22 pwm definition, (a) small pulse width, (b) large pu lse width 3.15.1 gpo gpios configured as gpo will operate as digital out puts which can generate both standard low/high logi c levels and pwm low/high duty cycles levels. typical applic ation is led on/off control. transitions between on and off states can be trigge red either automatically (autolight on) or manually by the host (autolight off). this is illustrated in figure s below.
advanced communications & sensing rev5 4 th august 2011 ? 2011 semtech corp. www.semtech.com 24 SX8662 capacitive button matrix (up to 36) controller with individual led drivers and buzzer output figure 23 led control in gpo mode, autolight off figure 24 led control in gpo mode, autolight on additionally these transitions can be configured to be done with or without fading following a logarit hmic or linear function. this is illustrated in figures below. figure 25 gpo on transition (led fade in), normal polarity, ( a) linear, (b) logarithmic figure 26 gpo on transition (led fade in), inverted polarity, (a) linear, (b) logarithmic the fading out (e.g. after a button is released) is identical to the fading in but an additional off d elay can be added before the fading starts (figure 27 and figure 28).
advanced communications & sensing rev5 4 th august 2011 ? 2011 semtech corp. www.semtech.com 25 SX8662 capacitive button matrix (up to 36) controller with individual led drivers and buzzer output figure 27 gpo off transition (led fade out), normal polarity, (a) linear, (b) logarithmic figure 28 gpo off transition (led fade out), inverted polarit y, (a) linear, (b) logarithmic please note that standard high/low logic signals ar e just a specific case of gpo mode and can also be generated simply by setting inc/dec time to 0 (i.e. off) and programming intensity off/on to 0x00 and 0xff. 3.15.2 fading modes the SX8662 supports two different fading modes, nam ely single and continuous. these fading modes can b e configured for each gpio individually. please see 5.6 gpio parameters for more information on how t o configure this feature. i) single fading mode: the gpo pin fades in when the associated button is touched and it fades out when it is released. this is shown in figure 29 fading-in off intensity on intensity delay_off fading-out off intensity on off off figure 29 single fading mode ii) continuous fading mode:
advanced communications & sensing rev5 4 th august 2011 ? 2011 semtech corp. www.semtech.com 26 SX8662 capacitive button matrix (up to 36) controller with individual led drivers and buzzer output the gpo pin fades in and fades out continuously whe n the associated button is touched. the fading in a nd out stops when the button is released. this is shown in figure 30. fading-in off intensity on intensity fading-out off intensity on off figure 30 continuous fading mode 3.15.3 intensity index vs pwm pulse width tables below are used to convert all intensity inde xes parameters gpiointensityoff, gpiointensityon an d gppintensity but also to generate fading in gpo mod e during fading in(out), the index is automatically i ncremented(decremented) at every inc(dec)time x inc(dec)factor until it reaches the programmed gpio intensityon(off) value. index lin/log index lin/log index lin/log index lin/log index lin/log index lin/log index lin/log index lin/log 0 0/0 32 33/5 64 65/12 96 97/26 128 129/48 160 161/81 192 193/125 224 225/184 1 2/0 33 34/5 65 66/13 97 98/27 129 130/49 161 162/82 193 194/127 225 226/186 2 3/0 34 35/5 66 67/13 98 99/27 130 131/50 162 163/83 194 195/129 226 227/188 3 4/0 35 36/5 67 68/13 99 100/28 131 132/51 163 164/84 195 196/130 227 228/190 4 5/0 36 37/5 68 69/14 100 101/29 132 133/52 164 165/86 196 197/132 228 229/192 5 6/2 37 38/6 69 70/14 101 102/29 133 134/53 165 166/87 197 198/133 229 230/194 6 7/2 38 39/6 70 71/14 102 103/30 134 135/54 166 167/88 198 199/135 230 231/197 7 8/2 39 40/6 71 72/15 103 104/30 135 136/55 167 168/89 199 200/137 231 232/199 8 9/2 40 41/6 72 73/15 104 105/31 136 137/55 168 169/91 200 201/139 232 233/201 9 10/2 41 42/6 73 74/15 105 106/32 137 138/56 169 170/92 201 202/140 233 234/203 10 11/2 42 43/7 74 75/16 106 107/32 138 139/57 170 171/93 202 203/142 234 235/205 11 12/2 43 44/7 75 76/16 107 108/33 139 140/58 171 172/95 203 204/144 235 236/208 12 13/2 44 45/7 76 77/16 108 109/33 140 141/59 172 173/96 204 205/146 236 237/210 13 14/2 45 46/7 77 78/17 109 110/34 141 142/60 173 174/97 205 206/147 237 238/212 14 15/3 46 47/7 78 79/17 110 111/35 142 143/61 174 175/99 206 207/149 238 239/215 15 16/3 47 48/8 79 80/18 111 112/35 143 144/62 175 176/100 207 208/151 239 240/217 16 17/3 48 49/8 80 81/18 112 113/36 144 145/63 176 177/101 208 209/153 240 241/219 17 18/3 49 50/8 81 82/19 113 114/37 145 146/64 177 178/103 209 210/155 241 242/221 18 19/3 50 51/8 82 83/19 114 115/38 146 147/65 178 179/104 210 211/156 242 243/224 19 20/3 51 52/9 83 84/20 115 116/38 147 148/66 179 180/106 211 212/158 243 244/226 20 21/3 52 53/9 84 85/20 116 117/39 148 149/67 180 181/107 212 213/160 244 245/229 21 22/3 53 54/9 85 86/21 117 118/40 149 150/68 181 182/109 213 214/162 245 246/231 22 23/3 54 55/9 86 87/21 118 119/40 150 151/69 182 183/110 214 215/164 246 247/233 23 24/4 55 56/10 87 88/22 119 120/41 151 152/71 183 184/111 215 216/166 247 248/236 24 25/4 56 57/10 88 89/22 120 121/42 152 153/72 184 185/113 216 217/168 248 249/238 25 26/4 57 58/10 89 90/23 121 122/43 153 154/73 185 186/114 217 218/170 249 250/241 26 27/4 58 59/10 90 91/23 122 123/44 154 155/74 186 187/116 218 219/172 250 251/243 27 28/4 59 60/11 91 92/24 123 124/44 155 156/75 187 188/117 219 220/174 251 252/246 28 29/4 60 61/11 92 93/24 124 125/45 156 157/76 188 189/119 220 221/176 252 253/248 29 30/4 61 62/11 93 94/25 125 126/46 157 158/77 189 190/121 221 222/178 253 254/251 30 31/4 62 63/12 94 95/25 126 127/47 158 159/78 190 191/122 222 223/180 254 255/253 31 32/5 63 64/12 95 96/26 127 128/48 159 160/80 191 192/124 223 224/182 255 256/256 table 7 intensity index vs. pwm pulse width (normal polarity) index lin/log index lin/log index lin/log index lin/log index lin/log index lin/log index lin/log index lin/log 0 256/256 32 224/251 64 192/244 96 160/230 128 128/208 160 96/175 192 64/131 224 32/72 1 255/256 33 223/251 65 191/243 97 159/229 129 127/207 161 95/174 193 63/129 225 31/70
advanced communications & sensing rev5 4 th august 2011 ? 2011 semtech corp. www.semtech.com 27 SX8662 capacitive button matrix (up to 36) controller with individual led drivers and buzzer output 2 254/256 34 222/251 66 190/243 98 158/229 130 126/206 162 94/173 194 62/127 226 30/68 3 253/256 35 221/251 67 189/243 99 157/228 131 125/205 163 93/172 195 61/126 227 29/66 4 252/256 36 220/251 68 188/242 100 156/227 132 124/204 164 92/170 196 60/124 228 28/64 5 251/254 37 219/250 69 187/242 101 155/227 133 123/203 165 91/169 197 59/123 229 27/62 6 250/254 38 218/250 70 186/242 102 154/226 134 122/202 166 90/168 198 58/121 230 26/59 7 249/254 39 217/250 71 185/241 103 153/226 135 121/201 167 89/167 199 57/119 231 25/57 8 248/254 40 216/250 72 184/241 104 152/225 136 120/201 168 88/165 200 56/117 232 24/55 9 247/254 41 215/250 73 183/241 105 151/224 137 119/200 169 87/164 201 55/116 233 23/53 10 246/254 42 214/249 74 182/240 106 150/224 138 118/199 170 86/163 202 54/114 234 22/50 11 245/254 43 213/249 75 181/240 107 149/223 139 117/198 171 85/161 203 53/112 235 21/48 12 244/254 44 212/249 76 180/240 108 148/223 140 116/197 172 84/160 204 52/110 236 20/46 13 243/254 45 211/249 77 179/239 109 147/222 141 115/196 173 83/159 205 51/109 237 19/44 14 242/253 46 210/249 78 178/239 110 146/221 142 114/195 174 82/157 206 50/107 238 18/41 15 241/253 47 209/248 79 177/238 111 145/221 143 113/194 175 81/156 207 49/105 239 17/39 16 240/253 48 208/248 80 176/238 112 144/220 144 112/193 176 80/155 208 48/103 240 16/37 17 239/253 49 207/248 81 175/237 113 143/219 145 111/192 177 79/153 209 47/101 241 15/35 18 238/253 50 206/248 82 174/237 114 142/218 146 110/191 178 78/152 210 46/100 242 14/32 19 237/253 51 205/247 83 173/236 115 141/218 147 109/190 179 77/150 211 45/98 243 13/30 20 236/253 52 204/247 84 172/236 116 140/217 148 108/189 180 76/149 212 44/96 244 12/27 21 235/253 53 203/247 85 171/235 117 139/216 149 107/188 181 75/147 213 43/94 245 11/25 22 234/253 54 202/247 86 170/235 118 138/216 150 106/187 182 74/146 214 42/92 246 10/23 23 233/252 55 201/246 87 169/234 119 137/215 151 105/185 183 73/145 215 41/90 247 9/20 24 232/252 56 200/246 88 168/234 120 136/214 152 104/184 184 72/143 216 40/88 248 8/18 25 231/252 57 199/246 89 167/233 121 135/213 153 103/183 185 71/142 217 39/86 249 7/15 26 230/252 58 198/246 90 166/233 122 134/212 154 102/182 186 70/140 218 38/84 250 6/13 27 229/252 59 197/245 91 165/232 123 133/212 155 101/181 187 69/139 219 37/82 251 5/10 28 228/252 60 196/245 92 164/232 124 132/211 156 100/180 188 68/137 220 36/80 252 4/8 29 227/252 61 195/245 93 163/231 125 131/210 157 99/179 189 67/135 221 35/78 253 3/5 30 226/252 62 194/244 94 162/231 126 130/209 158 98/178 190 66/134 222 34/76 254 2/3 31 225/251 63 193/244 95 161/230 127 129/208 159 97/176 191 65/132 223 33/74 255 0/0 table 8 intensity index vs. pwm pulse width (inverted polar ity) 3.15.4 tri-state multiplexing (tsm) SX8662 can support up to 36 individual leds ie one per matrix key. to make this possible with the limi ted gpios available a tri-state multiplexing driver has been implemented on chip and a specific led matrix conne ction must be followed for correct operation. figure 31 tri-state multiplexing schematics (dmkx = led of button mkx, cf figure 48) whenever set to gpo with autolight on, gpio0-6 (gpi o0-5 if pk is enabled) are automatically configured for tsm operation. if pk is enabled the matrix is reduced to 6x5 leds, dmk31-36 can be removed and gpio6 is automatically used for pk independent led feedback (if autoligth on, e lse can be controlled by the host).
advanced communications & sensing rev5 4 th august 2011 ? 2011 semtech corp. www.semtech.com 28 SX8662 capacitive button matrix (up to 36) controller with individual led drivers and buzzer output 4 p in descriptions 4.1 introduction this chapter describes briefly the pins of the sx86 62, the way the pins are protected, if the pins are analog, digital, require pull up or pull down resistors and show control signals if these are available. 4.2 asi pins cap0, cap1,...,cap11 the capacitance sensor pins (cap0, cap1,..., cap11) are connected directly to the asi circuitry which converts the sensed capacitance into digital values. the capacitance sensor pins which are not used shou ld be left open. the enabled cap pins need be connected directly to the sensors without significant resistance (typical below some ohms, connection vias are allowed). the capacitance sensor pins are protected to vana a nd ground. figure 32 shows the simplified diagram of the cap0, cap1,...cap11 pins. SX8662 sensor asi capx cap_inx vana note : x = 0, 1,2,7 figure 32 simplified diagram of cap0, cap1,...,cap11 cn, cp the cn and the cp pins are connected to the asi cir cuitry. a 1nf sampling capacitor between cp and cn needs to be placed as close as possible to the SX8662. the cn and cp are protected to vana and ground. figure 33 shows the simplified diagram of the cn an d cp pins.
advanced communications & sensing rev5 4 th august 2011 ? 2011 semtech corp. www.semtech.com 29 SX8662 capacitive button matrix (up to 36) controller with individual led drivers and buzzer output figure 33 simplified diagram of cn and cp 4.3 host interface pins the host interface consists of the interrupt pin in tb, a reset pin resetb and the standard i2c pins: s cl and sda. intb the intb pin is an open drain output that requires an external pull-up resistor (1..10 kohm). the intb pin is protected to vdd using dedicated devices. the intb pin has diode protected to ground. figure 34 shows a simplified diagram of the intb pi n. figure 34 simplified diagram of intb SX8662 asi cp vana cn vana v dd r_int intb SX8662 int to host
advanced communications & sensing rev5 4 th august 2011 ? 2011 semtech corp. www.semtech.com 30 SX8662 capacitive button matrix (up to 36) controller with individual led drivers and buzzer output scl the scl pin is a high impedance input pin. the scl pin is protected to vdd, using dedicated devices, i n order to conform to standard i2c slave specifications. the s cl pin has diode protected to ground. an external pull-up resistor (1..10 kohm) is requir ed on this pin. figure 35 shows the simplified diagram of the scl p in. figure 35 simplified diagram of scl sda sda is an io pin that can be used as an open drain output pin with external pull-up resistor or as a h igh impedance input pin. the sda io pin is protected to vdd, using dedicated devices, in order to conform to standard i2c slave specifications. the sda pin has diode protected to ground. an external pull-up resistor (1..10 kohm) is requir ed on this pin. figure 36 shows the simplified diagram of the sda p in. figure 36 simplified diagram of sda vdd r_ scl s cl SX8662 from host s cl _in vdd r_ sda sda SX8662 sda_out from/ to host sda_in
advanced communications & sensing rev5 4 th august 2011 ? 2011 semtech corp. www.semtech.com 31 SX8662 capacitive button matrix (up to 36) controller with individual led drivers and buzzer output resetb the resetb pin is a high impedance input pin. the r esetb pin is protected to vdd using dedicated devic es. the resetb pin has diode protected to ground. figure 37 shows the simplified diagram of the reset b pin controlled by the host. figure 37 simplified diagram of resetb controlled by host figure 38 shows the resetb without host control. figure 38 simplified diagram of resetb without host control vdd r_ resetb resetb SX8662 from host reset b _in vdd resetb SX8662 resetb _in
advanced communications & sensing rev5 4 th august 2011 ? 2011 semtech corp. www.semtech.com 32 SX8662 capacitive button matrix (up to 36) controller with individual led drivers and buzzer output 4.4 power management pins the power management pins consist of the power, gro und and regulator pins. vdd vdd is a power pin and is the main power supply for the SX8662. vdd has protection to ground. figure 39 shows a simplified diagram of the vdd pin . figure 39 simplified diagram of vdd gnd the SX8662 has four ground pins all named gnd. thes e pins and the package center pad need to be connec ted to ground potential. the gnd has protection to vdd. figure 40 shows a simplified diagram of the gnd pin . figure 40 simplified diagram of gnd vdd SX8662 vdd vdd SX8662 gnd gnd
advanced communications & sensing rev5 4 th august 2011 ? 2011 semtech corp. www.semtech.com 33 SX8662 capacitive button matrix (up to 36) controller with individual led drivers and buzzer output vana, vdig the SX8662 has on-chip regulators for internal use (pins vana and vdig). vana and vdig have protection to vdd and to gnd. the output of the regulators needs to be de-coupled with a small 100nf capacitor to ground. figure 41 shows a simplified diagram of the vana an d vdig pin. figure 41 simplified diagram of vana and vdig 4.5 general purpose io pins the SX8662 has 8 general purpose input/output (gpio ) pins. all the gpio pins have protection to vdd and gnd. figure 42 shows a simplified diagram of the gpio pi ns. figure 42 simplified diagram of gpio pins vdd SX8662 gnd vdig vdd gnd vana vana vdig cvdig cvana
advanced communications & sensing rev5 4 th august 2011 ? 2011 semtech corp. www.semtech.com 34 SX8662 capacitive button matrix (up to 36) controller with individual led drivers and buzzer output 5 d etailed c onfiguration descriptions 5.1 introduction the SX8662 configuration parameters are taken from the qsm or the nvm and loaded into the spm as expla ined in the chapter functional description. this chapter describes the details of the configura tion parameters of the SX8662. the spm is split by functionality into 5 configurat ion sections: general: operating modes, capacitive sensors: related to lower level capacit ive sensing, buttons (mk and pk): related to the conversion fro m sensor data towards button information, buzzer: defining parameters for the buzzer gpios: related to the setup of the gpio pins. the total address space of the spm and the nvm is 1 28 bytes, from address 0x00 to address 0x7f. two types of memory addresses, data are accessible to the user. application data: application dependent data tha t need to be configured by the user. reserved: data that need to be maintained by the user to the qsm default values (i.e. when nvm is b urned). the table 9 and table 10 resume the complete spm ad dress space and show the application data and reserved addresses, the functional split and the default values (loaded from the qsm).
advanced communications & sensing rev5 4 th august 2011 ? 2011 semtech corp. www.semtech.com 35 SX8662 capacitive button matrix (up to 36) controller with individual led drivers and buzzer output address name default/qsm value address name default/qsm value 0x00 reserved 0xxx 0x20 reserved 0x00 0x01 reserved 0xxx 0x21 reserved 0x00 0x02 reserved 0x42 0x22 btncfg 0x30 0x03 reserved 0xxx 0x23 btnavgthresh 0x50 0x04 i2caddress 0x2b 0x24 btncompnegthresh 0xa0 0x05 activescanperiod 0x02 0x25 btncompnegcntmax 0x01 0x06 dozescanperiod 0x0d 0x26 btnhysteresis 0x0a 0x07 passivetimer 0x00 0x27 btnstuckattimeout 0x00 0x08 general reserved 0x00 0x28 reserved 0x80 0x09 capmodemisc 0x00 0x29 reserved 0x00 0x0a reserved 0x55 0x2a buttons reserved 0xff 0x0b reserved 0x55 0x2b reserved 0x00 0x0c reserved 0x55 0x2c reserved 0x7d 0x0d capsensitivity0_1 0x44 0x2d reserved 0x00 0x0e capsensitivity2_3 0x44 0x2e reserved 0x0a 0x0f capsensitivity4_5 0x44 0x2f reserved 0x00 0x10 capsensitivity6_7 0x44 0x30 reserved 0x64 0x11 capsensitivity8_9 0x44 0x31 reserved 0x34 0x12 capsensitivity10_11 0x44 0x32 reserved 0x50 0x13 capthresh0 0xa0 0x33 reserved 0xa0 0x14 capthresh1 0xa0 0x34 reserved 0x01 0x15 capthresh2 0xa0 0x35 reserved 0x00 0x16 capthresh3 0xa0 0x36 reserved 0x00 0x17 capthresh4 0xa0 0x37 buzzercfg 0xa4 0x18 capthresh5 0xa0 0x38 buzzerfreqphase1 0x40 0x19 capthresh6 0xa0 0x39 buzzerfreqphase2 0x20 0x1a capthresh7 0xa0 0x3a buzzer reserved 0x00 0x1b capthresh8 0xa0 0x3b reserved 0x00 0x1c capthresh9 0xa0 0x3c reserved 0x00 0x1d capthresh10 0xa0 0x3d reserved 0x00 0x1e capthresh11 0xa0 0x3e reserved 0x00 0x1f capacitive sensors cappercomp 0 x00 0x3f reserved 0x00 table 9 spm address map: 0x000x3f note 0xxx: write protected data
advanced communications & sensing rev5 4 th august 2011 ? 2011 semtech corp. www.semtech.com 36 SX8662 capacitive button matrix (up to 36) controller with individual led drivers and buzzer output address name default/qsm value address name default/qsm value 0x40 reserved 0x00 0x60 gpiodectime7_6 0x44 0x41 reserved 0x00 0x61 gpiodectime5_4 0x44 0x42 reserved 0x00 0x62 gpiodectime3_2 0x44 0x43 gpiomode7_4 0x00 0x63 gpiodectime1_0 0x44 0x44 gpiomode3_0 0x00 0x64 gpiooffdelay7_6 0x00 0x45 gpiointensityon0 0xff 0x65 gpiooffdelay5_4 0x00 0x46 gpiointensityon1 0xff 0x66 gpiooffdelay3_2 0x00 0x47 gpiointensityon2 0xff 0x67 gpiooffdelay1_0 0x00 0x48 gpiointensityon3 0xff 0x68 reserved 0x00 0x49 gpiointensityon4 0xff 0x69 reserved 0x00 0x4a gpiointensityon5 0xff 0x6a reserved 0x00 0x4b gpiointensityon6 0xff 0x6b reserved 0x00 0x4c gpiointensityon7 0xff 0x6c reserved 0x00 0x4d gpiointensityoff0 0x00 0x6d gpiofadingmode7_4 0x00 0x4e gpiointensityoff1 0x00 0x6e gpios gpiofadingmode3_0 0x00 0x4f gpiointensityoff2 0x00 0x6f reserved 0x50 0x50 gpiointensityoff3 0x00 0x70 reserved 0x74 0x51 gpiointensityoff4 0x00 0x71 reserved 0x10 0x52 gpiointensityoff5 0x00 0x72 reserved 0x45 0x53 gpiointensityoff6 0x00 0x73 reserved 0x02 0x54 gpiointensityoff7 0x00 0x74 reserved 0xff 0x55 reserved 0xff 0x75 reserved 0xff 0x56 gpiooutpwrup 0x00 0x76 reserved 0xff 0x57 gpioautolight 0xff 0x77 reserved 0xd5 0x58 gpopolarity 0x7f 0x78 reserved 0x55 0x59 gpiofunction 0x00 0x79 reserved 0x55 0x5a gpioincfactor 0x00 0x7a reserved 0x7f 0x5b gpiodecfactor 0x00 0x7b reserved 0x23 0x5c gpioinctime7_6 0x00 0x7c reserved 0x22 0x5d gpioinctime5_4 0x00 0x7d reserved 0x41 0x5e gpioinctime3_2 0x00 0x7e reserved 0xff 0x5f gpios gpioinctime1_0 0x00 0x7f spmcrc 1 0xxx table 10 spm address map: 0x400x7f note 1 spmcrc: crc depending on spm content, updated in active or doze mode.
advanced communications & sensing rev5 4 th august 2011 ? 2011 semtech corp. www.semtech.com 37 SX8662 capacitive button matrix (up to 36) controller with individual led drivers and buzzer output 5.2 general parameters general parameters address name bits description 7 reserved (0) 0x04 i2caddress 6:0 defines the i2c address. the i2c address will be active after a reset. default: 0x2b 0x05 activescanperiod 7:0 defines active mode scan period (figure 6). 0x00: reserved 0x01: 15ms 0x02: 30ms (default) 0xff: 255 x 15ms 0x06 dozescanperiod 7:0 defines doze mode scan period ( figure 6). 0x00: reserved 0x01: 15ms 0x0d: 195ms (default) 0xff: 255 x 15ms 0x07 passivetimer 7:0 defines passive timer on button information (figure 7). 0x00: off (default) 0x01: 1 second 0xff: 255 seconds 0x08 reserved 7:0 reserved (0x00) table 11 general parameters
advanced communications & sensing rev5 4 th august 2011 ? 2011 semtech corp. www.semtech.com 38 SX8662 capacitive button matrix (up to 36) controller with individual led drivers and buzzer output 5.3 capacitive sensors parameters capacitive sensors parameters address name bits description 7:5 reserved (000) 4:3 capsenseprotect: 00: off (default) 01: on. gpios activity is disabled during cap11 sensi ng. 10: on. gpios activity is disabled during cap10-11 sen sing. 11: on. gpios activity is disabled during cap0-11 sens ing (i.e. all capx). 0x09 capmodemisc 2:0 individualsensitivity defines common sensitivity for all sensors or indiv idual sensor sensitivity. 000: common sensitivity settings (capsensitivity0_1 [7:4]) (default) 100: individual sensitivity settings (capsensitivity x_x) else : reserved 0x0a reserved 7:0 reserved (0x55) 0x0b reserved 7:0 reserved (0x55) 0x0c reserved 7:0 reserved (0x55) 7:4 cap0 sensitivity - common sensitivity 0x0d capsensitivity0_1 3:0 cap1 sensitivity 7:4 cap2 sensitivity 0x0e capsensitivity2_3 3:0 cap3 sensitivity 7:4 cap4 sensitivity 0x0f capsensitivity4_5 3:0 cap5 sensitivity 7:4 cap6 sensitivity 0x10 capsensitivity6_7 3:0 cap7 sensitivity 7:4 cap8 sensitivity 0x11 capsensitivity8_9 3:0 cap9 sensitivity 7:4 cap10 sensitivity 0x12 capsensitivity10_1 1 3:0 cap11 sensitivity defines the sensitivity. 0x0: minimum 0x1: 1 0x4: 4 (default) 0x7: maximum 0x8..0xf: reserved 0x13 capthresh0 7:0 cap0 touch threshold 0x14 capthresh1 7:0 cap1 touch threshold 0x15 capthresh2 7:0 cap2 touch threshold 0x16 capthresh3 7:0 cap3 touch threshold 0x17 capthresh4 7:0 cap4 touch threshold 0x18 capthresh5 7:0 cap5 touch threshold 0x19 capthresh6 7:0 cap6 touch threshold 0x1a capthresh7 7:0 cap7 touch threshold 0x1b capthresh8 7:0 cap8 touch threshold 0x1c capthresh9 7:0 cap9 touch threshold 0x1d capthresh10 7:0 cap10 touch threshold 0x1e capthresh11 7:0 cap11 touch threshold defines the touch threshold ticks. 0x00: 0, 0x01: 4, 0xa0: 640 (default), 0xff: 1020 0x1f cappercomp 7:4 reserved (0000)
advanced communications & sensing rev5 4 th august 2011 ? 2011 semtech corp. www.semtech.com 39 SX8662 capacitive button matrix (up to 36) controller with individual led drivers and buzzer output capacitive sensors parameters address name bits description 3:0 periodic offset compensation defines the perio dic offset compensation. 0x0: off (default) 0x1: 1 second 0x2: 2 seconds 0x7: 7 seconds 0x8: 16 seconds 0x9: 18 seconds 0xe: 28 seconds 0xf: 60 seconds table 12 capacitive sensors parameters capsenseprotect if needed, asi activity can be protected against le d interference by automatically disabling gpios dur ing sensing periods. at the end of the sensing activity , gpios activity resume normally. capmodemisc by default the asi uses common sensitivity for all capacitive sensors in the case overlay material and sensors sizes are about equal. the register bits capsensiti vity0_1[7:4] determine the sensitivity for all sens ors in common sensitivity mode. the asi can use an individual sensitivity for each cap pin the individual sensitivity mode results in longer sensing periods than required in common sensitivity mode. capsensitivity0_1, capsensitivity2_3, capsensitivit y4_5, capsensitivity6_7, capsensitivity8_9, capsensitivity10_11 the sensitivity of the sensors can be set between 8 values. the higher the sensitivity is set the larg er the value of the ticks will be. the minimum sensitivity can be used for thin overla y materials and large sensors, while the maximum sensitivity is required for thicker overlay and sma ller sensors. the required sensitivity needs to be determined dur ing a product development phase. too low sensitivit y settings result in missing touches. too high sensit ivity settings will result in fault detection of fi ngers hovering above the touch sensors. the sensitivity is identical for all sensors in com mon sensitivity mode using the bits capsensitivity0 _1[7:4] and can be set individually using register capmodemisc[ 2:0]. capthresh0, capthresh1, capthresh2, capthresh3, cap thresh4, capthresh5, capthresh6, capthresh7, capthresh8, capthresh9, capthresh10, capthresh11: for each cap pin a threshold level can be set indiv idually. the threshold levels are used by the SX8662 for mak ing touch and release decisions. the details are explained in the sections for butto ns. cappercomp the SX8662 offers a periodic offset compensation fo r applications which are subject to substantial environmental changes. the periodic offset compensa tion is done at a defined interval and only if butt ons are released.
advanced communications & sensing rev5 4 th august 2011 ? 2011 semtech corp. www.semtech.com 40 SX8662 capacitive button matrix (up to 36) controller with individual led drivers and buzzer output 5.4 buttons (mk and pk) parameters buttons parameters address name bits description 7 reporting scheme: 0: report both mk and pk touches (multi mk touch is nev er allowed/reported) (default) 1: report first/single mk or pk touch (ignore next to uch until release of the first one) 6 priority key (pk): 0: off (default) 1: on (cap11) 5:4 button events to be reported on nirq. 00 : none 01 : touch 10 : release 11 : both (default) 3:2 defines the number of samples at the scan perio d for determining a release of a button. 00 : no debounce, use incoming sample (default) 01 : 2 samples debounce 10 : 3 samples debounce 11 : 4 samples debounce 0x22 btncfg 1:0 defines the number of samples at the scan perio d for determining a touch of a button. 00 : no debounce, use incoming sample (default) 01 : 2 samples debounce 10 : 3 samples debounce 11 : 4 samples debounce 0x23 btnavgthresh 7:0 defines the positive threshold for disabling the processing filter averaging. if ticks are above the threshold, then the averagin g is suspended. 0x00: 0 0x01: 4 0x50: 320 (default) 0xff: 1020 0x24 btncompnegthresh 7:0 defines the negative offse t compensation threshold. 0x00: 0 0x01: 4 0xa0: 640 (default) 0xff: 1020 0x25 btncompnegcntmax 7:0 defines the number of tick s (below the negative offset compensation threshold ) which will initiate an offset compensation. 0x00: reserved 0x01: 1 sample (default) 0xff: 255 samples 0x26 btnhysteresis 7:0 defines the button hysteresis corresponding to a percentage of the cap thresholds (defined in table 12). all buttons use the same hysteresis. 0x00: 0% 0x01: 1% 0x0a: 10% (default)
advanced communications & sensing rev5 4 th august 2011 ? 2011 semtech corp. www.semtech.com 41 SX8662 capacitive button matrix (up to 36) controller with individual led drivers and buzzer output buttons parameters address name bits description 0x64: 100% 0x27 btnstuckattimeout 7:0 defines the stuck at timeou t for buttons. 0x00: off (default) 0x01: 1 second 0xff: 255 seconds table 13 button parameters a reliable button operation requires a coherent set ting of the registers. figure 43 shows an example of a touch and a release . the ticks will vary slightly around the zero idle state. when the touch occurs the ticks will rise sharply. at the release of the button the ticks will go down rapidly and converge to the idle zero value. ticks_diff figure 43 touch and release example as soon as the ticks become larger than the cap thr esholds (see registers of the previous section) plu s the hysteresis (defined in register btnhysteresis ) the debounce counter starts. in the example of figure 43 the touch is validated after 2 ticks ( btncfg [2:0] = 1). the release is detected immediately ( btncfg [3] = 0) at the first tick which is below the thre shold minus the hysteresis. btncfg the user can select to have the interrupt signal (i ntb) on touching a button, releasing a button or bo th. in noisy environments it may be required to debounc e the touch and release detection decision. in case the debounce is enabled the SX8662 will cou nt up to the number of debounce samples btncfg [1:0 ], btncfg [3:2] before taking a touch or release decis ion. the sample period is identical to the scan per iod. btnavgposthresh small environmental and system noise cause the tick s to vary slowly around the zero idle mode value. in case the ticks get slightly positive this is con sidered as normal operation. very large positive ti ck values indicate a valid touch. the averaging filter is dis abled as soon as the average reaches the value defi ned by
advanced communications & sensing rev5 4 th august 2011 ? 2011 semtech corp. www.semtech.com 42 SX8662 capacitive button matrix (up to 36) controller with individual led drivers and buzzer output btnavgposthresh. this mechanism avoids that a valid touch will be averaged and finally the tick differ ence becomes zero. in case three or more sensors reach the btnavgposth resh value simultaneously then the SX8662 will star t an offset compensation procedure. small environmental and system noise cause the tick s to vary slowly around the zero idle mode value. in case the ticks get slightly negative this is con sidered as normal operation. however large negative values will trigger an offset compensation phase and a new set of dcvs will be obtained. the decision to trigger a compensation phase based on negative ticks is determined by the value in the register btncompnegthresh and by the number of ticks below t he negative thresholds defined in register btncompnegcntmax. an example is shown in figure 44 . ticks_avg figure 44 negative ticks offset compensation trigger btncompnegthresh small negative ticks are considered as normal opera tion and will occur very often. larger negative ticks however need to be avoided an d a convenient method is to trigger an offset compensation phase. the new set of dcv will assure the idle ticks will be close to zero again. a trade-off has to be found for the value of this r egister. a negative threshold too close to zero wil l trigger a compensation phase very often. a very negative thre shold will never trigger. btncompnegcntmax as soon as the ticks get smaller than the negative threshold the negative counter starts to count. if the counter goes beyond the negative counter max then the offset compensation phase is triggered. the recommended value for this register is 1 whic h means that the offset compensation starts on the first tick below the negative threshold. btnhysteresis the hysteresis percentage is identical for all butt ons. a touch is detected if the ticks are getting larger as the value defined by: capthreshold + capthreshold * hysteresis. a release is detected if the ticks are getting smal ler as the value defined by: capthreshold - capthreshold * hysteresis. btnstuckattimeout the stuckat timer can avoid sticky buttons. if the stuckat timer is set to one second then the touch of a finger will last only for one second and then a compensation will be performed and button hence con sidered released, even if the finger remains on the button for a longer time. after the actual finger r elease the button can be touched again and will be reported as usual. in case the stuckat timer is not required it can be set to zero.
advanced communications & sensing rev5 4 th august 2011 ? 2011 semtech corp. www.semtech.com 43 SX8662 capacitive button matrix (up to 36) controller with individual led drivers and buzzer output 5.5 buzzer parameters buzzer parameters address name bits description 7:6 defines the phase 1 duration. 0x00: ~ 5ms 0x01: ~ 10ms 0x02: ~ 15ms (default) 0x03: ~ 30ms 5:4 defines the phase 2 duration. 0x00: ~ 5ms 0x01: ~ 10ms 0x02: ~ 15ms (default) 0x03: ~ 30ms 3 defines the buzzer idle level (buzzerlevelidle). 0x0: min level (0v), (default) 0x1: max level (vdd) 0x37 buzzercfg 2:0 defines the buzzer pwm prescaler value. default: 0x04 0x38 buzzerfreqphase1 7:0 defines the frequency for the first phase of th e buzzer. freq 4mhz /(2^prescaler * buzzerfreqphase1) default: 0x40 (4khz) 0x39 buzzerfreqphase2 7:0 defines the frequency for the second phase of t he buzzer. freq 4mhz /(2^prescaler * buzzerfreqphase2) default: 0x20 (8khz) 0x3a reserved 7:0 reserved (0x00) table 14 buzzer parameters the SX8662 has the ability to drive a buzzer (on gp io7) to provide an audible indication that a button has been touched. the buzzer is driven by a square signal fo r approximately 30ms (default). during the first ph ase (15ms) the signals frequency is default 4khz while in the second phase (15ms) the signals frequency default is 8khz. the buzzer is activated only once during any button touch and is not repeated for long touches. the us er can choose to enable or disable the buzzer by configura tion and define the idle level, frequencies and pha se durations. figure 45 buzzer behavior
advanced communications & sensing rev5 4 th august 2011 ? 2011 semtech corp. www.semtech.com 44 SX8662 capacitive button matrix (up to 36) controller with individual led drivers and buzzer output 5.6 gpio parameters gpio parameters address name bits description 7:6 gpio[7] mode default gpo 5:4 gpio[6] mode default gpo 3:2 gpio[5] mode default gpo 0x43 gpiomode7_4 1:0 gpio[4] mode default gpo 7:6 gpio[3] mode default gpo 5:4 gpio[2] mode default gpo 3:2 gpio[1] mode default gpo 0x44 gpiomode3_0 1:0 gpio[0] mode defines the gpio mode. 00: gpo 01: reserved 10: reserved 11: spo: buzzer for gpio[7], reserved for gpio[6..0] default gpo 0x45 gpiointensityon0 7:0 0x46 gpiointensityon1 7:0 0x47 gpiointensityon2 7:0 0x48 gpiointensityon3 7:0 0x49 gpiointensityon4 7:0 0x4a gpiointensityon5 7:0 0x4b gpiointensityon6 7:0 0x4c gpiointensityon7 7:0 defines the on intensity index. 0x00: 0 0x01: 1 0xff: 255 (default) 0x4d gpiointensityoff0 7:0 0x4e gpiointensityoff1 7:0 0x4f gpiointensityoff2 7:0 0x50 gpiointensityoff3 7:0 0x51 gpiointensityoff4 7:0 0x52 gpiointensityoff5 7:0 0x53 gpiointensityoff6 7:0 0x54 gpiointensityoff7 7:0 defines the off intensity index. 0x00: 0 (default) 0x01: 1 0xff: 255 0x56 gpiooutpwrup 7:0 defines the values of gpo pins after power up i.e. default values of i2c parameters gpoctrl. bits corresponding to gpo pins with autolight on shoul d be left to 0. before being actually initialized gpios are shortly s et as inputs with pull up. 0: off(default) 1: on 0x57 gpioautolight 7:0 enables autolight in gpo mode. 0: off 1: on (default). gpio0-5 = mk(tsm); gpio6 = mk(tsm) or pk if enabled 0x58 gpiopolarity 7:0 defines the polarity of the gpo pins. spo pins require normal polarity. 0: inverted 1: normal default : 0x7f 0x59 gpiofunction 7:0 defines the intensity index v s pwm pulse width function. 0: logarithmic (default) 1: linear
advanced communications & sensing rev5 4 th august 2011 ? 2011 semtech corp. www.semtech.com 45 SX8662 capacitive button matrix (up to 36) controller with individual led drivers and buzzer output gpio parameters address name bits description 0x5a gpioincfactor 7:0 defines the fading increment factor. 0: intensity index incremented every increment time (default) 1: intensity index incremented every 16 increment t imes 0x5b gpiodecfactor 7:0 defines the fading decrement factor. 0: intensity index decremented every decrement time (default) 1: intensity index decremented every 16 decrement t imes 7:4 gpio[7] fading increment time 0x5c gpioinctime7_6 3:0 gpio[6] fading increment time 7:4 gpio[5] fading increment time 0x5d gpioinctime5_4 3:0 gpio[4] fading increment time 7:4 gpio[3] fading increment time 0x5e gpioinctime3_2 3:0 gpio[2] fading increment time 7:4 gpio[1] fading increment time 0x5f gpioinctime1_0 3:0 gpio[0] fading increment time defines the fading increment time. 0x0: off (default) 0x1: 0.5ms 0x2: 1ms 0xf: 7.5ms the total fading in time will be: gpioinctime*gpioincfactor* (gpiointensityon C gpiointensityoff) 7:4 gpio[7] fading decrement time 0x60 gpiodectime7_6 3:0 gpio[6] fading decrement time 7:4 gpio[5] fading decrement time 0x61 gpiodectime5_4 3:0 gpio[4] fading decrement time 7:4 gpio[3] fading decrement time 0x62 gpiodectime3_2 3:0 gpio[2] fading decrement time 7:4 gpio[1] fading decrement time 0x63 gpiodectime1_0 3:0 gpio[0] fading decrement time defines the fading decrement time. 0x0: off 0x1: 0.5ms 0x2: 1ms 0x4: 2.0ms (default) 0xf: 7.5ms the total fading out time will be: gpiodectime*gpiodecfactor* (gpiointensityon C gpiointensityoff) 7:4 gpio[7] off delay 0x64 gpiooffdelay7_6 3:0 gpio[6] off delay 7:4 gpio[5] off delay 0x65 gpiooffdelay5_4 3:0 gpio[4] off delay 7:4 gpio[3] off delay 0x66 gpiooffdelay3_2 3:0 gpio[2] off delay 7:4 gpio[1] off delay 0x67 gpiooffdelay1_0 3:0 gpio[0] off delay defines the delay between release and start of fading out (single fading) 0x0: instantaneous (default) 0x1: 200 ms 0x2: 400 ms 0x3: 600ms 0xa: 2s 0xb: 4s 0xf: 12s 0x68 reserved 7:0 reserved (0x00) 0x69 reserved 7:0 reserved (0x00) 0x6a reserved 7:0 reserved (0x00) 0x6b reserved 7:0 reserved (0x00) 0x6c reserved 7:0 reserved (0x00) 7:6 fading mode for gpio[7] 5:4 fading mode for gpio[6] 3:2 fading mode for gpio[5] 0x6d gpiofadingmode7_4 1:0 fading mode for gpio[4] 0x6e gpiofadingmode3_0 7:6 fading mode for gpio[3] defines the fading mode for gpo[7:0]. 00: single (default) 01: continuous 10: reserved 11: reserved
advanced communications & sensing rev5 4 th august 2011 ? 2011 semtech corp. www.semtech.com 46 SX8662 capacitive button matrix (up to 36) controller with individual led drivers and buzzer output gpio parameters address name bits description 5:4 fading mode for gpio[2] 3:2 fading mode for gpio[1] 1:0 fading mode for gpio[0] the fading modes are expected to be defined at power up by the qsm or nvm. in case the fading modes need to be changed after power up this can be done when the gpos are all off. table 15 resumes the applicable spm and i2c paramet ers for each gpio mode. gpo autolight off gpo autolight on spo (buzzer C gpio7 only) gpiomode x x x gpiooutpwrup x 1 off off gpioautolight off on on gpiopolarity x tsm->normal else x normal gpiointensityon x x gpiointensityoff x tsm->0% else x gpiofunction x x linear gpioincfactor x x gpiodecfactor x x gpioinctime x x gpiodectime x x gpiooffdelay x x spm gpiofadingmode x x i2c gpoctrl x 1 gpiooutpwrup must be set to off in continuous fadin g mode grey = not applicable, with or without required set ting table 15 applicable (x) spm/i2c parameters vs. gpio mode
advanced communications & sensing rev5 4 th august 2011 ? 2011 semtech corp. www.semtech.com 47 SX8662 capacitive button matrix (up to 36) controller with individual led drivers and buzzer output 6 i2c i nterface the i2c implemented on the SX8662 is compliant with : - standard (100kb/s), fast mode (400kb/s) - slave mode - 7 bit address (default 0x2b). the default address can be changed in the nvm at address 0x04. the host can use the i2c to read and write data at any time. the effective changes will be applied at the next processing phase (section 3.2). three types of registers are considered: - status (read). these registers give information a bout the status of the capacitive buttons, gpis, op eration modes etc - control (read/write). these registers control the soft reset, operating modes, gpios and offset comp ensation. - spm gateway (read/write). these registers are use d for the communication between host and the spm. the spm gateway communication is done typically at powe r up and is not supposed to be changed when the application is running. the spm needs to be re-stor ed each time the SX8662 is powered down. the spm can be stored permanently in the nvm memory of the SX8662. the spm gateway communication over the i2c at power up is then not required. the i2c will be able to read and write from a start address and then perform read or writes sequential ly, and the address increments automatically. the supported i2c access formats are described in t he next sections. 6.1 i2c write the format of the i2c write is given in figure 46. after the start condition [s], the slave address (s a) is sent, followed by an eighth bit (0) indicat ing a write. the SX8662 then acknowledges [a] that it is being addre ssed, and the master sends an 8 bit data byte consi sting of the SX8662 register address (ra). the slave acknowl edges [a] and the master sends the appropriate 8 bi t data byte (wd0). again the slave acknowledges [a]. in ca se the master needs to write more data, a succeedin g 8 bit data byte will follow (wd1), acknowledged by the sl ave [a]. this sequence will be repeated until the m aster terminates the transfer with the stop condition [p] . figure 46 i2c write the register address is incremented automatically w hen successive register data (wd1...wdn) is supplie d by the master.
advanced communications & sensing rev5 4 th august 2011 ? 2011 semtech corp. www.semtech.com 48 SX8662 capacitive button matrix (up to 36) controller with individual led drivers and buzzer output 6.2 i2c read the format of the i2c read is given in figure 47. after the start condition [s], the slave address (s a) is sent, followed by an eighth bit (0) indicat ing a write. the SX8662 then acknowledges [a] that it is being addre ssed, and the master responds with an 8 bit data co nsisting of the register address (ra). the slave acknowledge s [a] and the master sends the repeated start condi tion [sr]. once again, the slave address (sa) is sent, f ollowed by an eighth bit (1) indicating a read. the SX8662 responds with acknowledge [a] and the re ad data byte (rd0). if the master needs to read mor e data it will acknowledge [a] and the SX8662 will se nd the next read byte (rd1). this sequence can be r epeated until the master terminates with a nack [n] followe d by a stop [p]. figure 47 i2c read
advanced communications & sensing rev5 4 th august 2011 ? 2011 semtech corp. www.semtech.com 49 SX8662 capacitive button matrix (up to 36) controller with individual led drivers and buzzer output 6.3 i2c registers overview address name r/w description 0x00 irqsrc read interrupt source 0x01 capstatkeys read cap status 0x02 reserved 0x03 reserved 0x04 reserved 0x05 reserved 0x06 reserved 0x07 reserved 0x08 spmstat read spm status 0x09 compopmode read/write compensation and operating mode 0x0a gpoctrl 0x0b reserved 0x0c reserved 0x0d spmcfg read/write spm configuration 0x0e spmbaseaddr read/write spm base address 0x0f reserved 0xac spmkeymsb read/write spm key msb 0xad spmkeylsb read/write spm key lsb 0xb1 softreset read/write software reset table 16 i2c registers overview
advanced communications & sensing rev5 4 th august 2011 ? 2011 semtech corp. www.semtech.com 50 SX8662 capacitive button matrix (up to 36) controller with individual led drivers and buzzer output 6.4 status registers address name bits description 7 reserved 6 nvm burn interrupt flag 5 spm write interrupt flag 4 reserved 3 reserved 2 sensors interrupt flag 1 compensation interrupt flag 0x00 irqsrc 0 operating mode interrupt flag interrupt source flags 0: inactive (default) 1: active intb goes low if any of these bits is set. more than one bit can be set. reading irqsrc clears it together with intb. table 17 interrupt source the delay between the actual event and the flags in dicating the interrupt source may be one scan perio d. irqsrc[6] is set once nvm burn procedure is complet ed. irqsrc[5] is set once spm write is effective. irqsrc[2] is set if a sensor event occurred. capsta tkeys show the detailed status of the sensors. irqsrc[1] is set once compensation procedure is com pleted either through automatic trigger or via host request. irqsrc[0] is set when actually entering active or d oze mode via host request. compopmode shows the cur rent operation mode.
advanced communications & sensing rev5 4 th august 2011 ? 2011 semtech corp. www.semtech.com 51 SX8662 capacitive button matrix (up to 36) controller with individual led drivers and buzzer output address name bits description 7 reserved 6 priority key status 0 : not touched. 1 : touched. 0x01 capstatkeys 5:0 matrix keys status 0x00: no touch on matrix 0x01: key1 (mk1) is touched 0x02: key2 (mk2) is touched 0x24: key36 (mk36) is touched if several matrix buttons are touched only the firs t one is reported. cf figure below for mk mapping/numbering vs capx pins table 18 i2c cap status figure 48 matrix keys mapping address name bits description 7:4 reserved 0x08 spmstat 3 nvmvalid indicates if the current nvm is valid. 0: no C qsm is used 1: yes C nvm is used
advanced communications & sensing rev5 4 th august 2011 ? 2011 semtech corp. www.semtech.com 52 SX8662 capacitive button matrix (up to 36) controller with individual led drivers and buzzer output address name bits description 2:0 nvmcount indicates the number of times nvm has been burned: 0: none C qsm is used (default) 1: once C nvm is used if nvmvalid = 1, else qsm. 2: twice C nvm is used if nvmvalid = 1, else qsm. 3: three times C nvm is used if nvmvalid = 1, else qsm . 4: more than three times C qsm is used table 19 i2c spm status 6.5 control registers address name bits description 7:3 reserved*, write only 00000 2 compensation indicates/triggers compensation procedure 0: compensation completed (default) 1: read -> compensation running ; write -> trigger compensation 0x09 compopmode 1:0 operating mode indicates/programs** operating mode 00: active mode (default) 01: doze mode 10: sleep mode 11: reserved * the reading of these reserved bits will return va rying values. ** after the operating mode change (active/doze) th e host should wait for intb or 300ms before performing any i2c read access. table 20 i2c compensation, operation modes address name bits description 0x0a gpoctrl 7:0 gpoctrl[7:0] triggers on/off state of gpos when autolight is off 0: off (i.e. go to intensityoff) 1: on (i.e. go to intensityon) default is set by spm parameter gpiooutpwrup bits of non-gpo pins are ignored. table 21 i2c gpo control address name bits description 0xb1 softreset 7:0 writing 0xde followed by 0x00 will reset the chi p. table 22 i2c soft reset
advanced communications & sensing rev5 4 th august 2011 ? 2011 semtech corp. www.semtech.com 53 SX8662 capacitive button matrix (up to 36) controller with individual led drivers and buzzer output 6.6 spm gateway registers the SX8662 i2c interface offers two registers for e xchanging the spm data with the host. spmcfg spmbaseaddr address name bits description 7:6 00: reserved 5:4 defines the normal operation or spm mode 00: i2c in normal operation mode (default) 01: i2c in spm mode 10: reserved 11: reserved 3 defines r/w direction of spm 0: spm write access (default) 1: spm read access 0x0d spmcfg 2:0 000: reserved table 23 spm access configuration address name bits description 0x0e spmbaseaddr 7:0 spm base address (modulo 8). the lowest address is 0x00 (default) the highest address is 0x78. table 24 spm base address the exchange of data, read and write, between the h ost and the spm is always done in bursts of eight b ytes. the base address of each burst of eight bytes is a modulo 8 number, starting at 0x00 and ending at 0x7 8. the registers spmkeymsb and spmkeylsb are required for nvm programming as described in section 6.7. address name bits description 0xac spmkeymsb 7:0 spm to nvm burn key msb unlock requires writing data: 0x62 table 25 spm key msb at i2c register address 0xac address name bits description 0xad spmkeylsb 7:0 spm to nvm burn key lsb unlock requires writing data: 0x9d table 26 spm key lsb
advanced communications & sensing rev5 4 th august 2011 ? 2011 semtech corp. www.semtech.com 54 SX8662 capacitive button matrix (up to 36) controller with individual led drivers and buzzer output 6.6.1 spm write sequence the spm must always be written in blocks of 8 bytes . the sequence is described below: 1. set the i2c in spm mode by writing 01 to spmcf g[5:4] and spm write access by writing 0 to spmcf g[3]. 2. write the spm base address to spmbaseaddr (the b ase address needs to be a value modulo 8). 3. write the eight consecutive bytes to i2c address 0, 1, 2, 7 4. terminate by writing 000 to spmcfg[5:3]. figure 49 spm write sequence the complete spm can be written by repeating 16 tim es the cycles shown in figure 49 using base address es 0x00, 0x08, 0x10,0x70, 0x78. once the spm write sequence is actually applied, th e intb pin will be asserted. the host clears the in terrupt by reading any i2c register. at the same time the bit genstatmsb[6], indicating the spm write is done, wi ll be cleared.
advanced communications & sensing rev5 4 th august 2011 ? 2011 semtech corp. www.semtech.com 55 SX8662 capacitive button matrix (up to 36) controller with individual led drivers and buzzer output 6.6.2 spm read sequence the spm must always be read in blocks of 8 bytes. t he sequence is described below: 1. set the i2c in spm mode by writing 01 to spmcf g[5:4] and spm read access by writing 1 to spmcfg [3]. 2. write the spm base address to spmbaseaddr (the b ase address needs to be a value modulo 8). 3. read the eight consecutive bytes from i2c addres s 0, 1, 2, 7 4. terminate by writing 000 to spmcfg[5:3]. figure 50 spm read sequence the complete spm can be read by repeating 16 times the cycles shown in figure 50 using base addresses 0x00, 0x08, 0x10,0x70, 0x78. once the spm read sequence is actually applied, the intb pin will be asserted. the host clears the int errupt by reading any i2c register. at the same time the bit genstatmsb[6], indicating the spm write is done, wi ll be cleared.
advanced communications & sensing rev5 4 th august 2011 ? 2011 semtech corp. www.semtech.com 56 SX8662 capacitive button matrix (up to 36) controller with individual led drivers and buzzer output 6.7 nvm burn the content of the spm can be copied permanently (b urned) into the nvm to be used as the new default parameters. the burning of the nvm can be done up t o three times and must be done only when the spm is completely written with the desired data. the number of times the nvm has been burned can be monitored by reading nvmcycle from the i2c register genstatlsb[7:5]. figure 51 simplified diagram nvmcycle figure 51 shows the simplified diagram of the nvmcy cle counter. the SX8662 is delivered with empty nvm and nvmcycle set to zero. the spm points to the qsm. each nvm burn will increase the nvmcycle. at the fo urth nvm burn the SX8662 switches definitely to the qsm. the burning of the spm into the nvm is done by exec uting a special sequence of four i2c commands. 1. write the data 0x62 to the i2c register i2ckeyms b. terminate the i2c write by a stop. 2. write the data 0x9d to the i2c register i2ckeyls b. terminate the i2c write by a stop. 3. write the data 0xa5 to the i2c register i2cspmba seaddr. terminate the i2c write by a stop. 4. write the data 0x5a to the i2c register i2cspmba seaddr. terminate the i2c write by a stop. this is illustrated in figure 52. s sa 0 0x0e a 0xa5 a p a s :startcondition sa :slaveaddress a :slaveacknowledge p :stopcondition frommastertoslave fromslavetomaster s sa 0 0x0e a 0x5a a p a 3) 4) s sa 0 0xac a 0x62 a p a s sa 0 0xad a 0x9d a p a 1) 2) figure 52: nvm burn procedure
advanced communications & sensing rev5 4 th august 2011 ? 2011 semtech corp. www.semtech.com 57 SX8662 capacitive button matrix (up to 36) controller with individual led drivers and buzzer output 7 a pplication i nformation a typical application schematic is shown in figure below. SX8662 cap2 cap3 cap4 cap5 cap6 cap8 cap7 cap9 gnd gpio5 gpio4 gpio3 gpio2 gpio1 gpio0 cap1 cap0 vana resetb gnd gpio7 vdig gpio6 cap10 cap11 cn cp vdd scl intb sda analog sensor interface micro processor ram rom nvm i2c gpio controller power management clock generation rc pwm led controller bottom plate host 36 capacitive matrix buttons 36 matrix leds cap4 cap11 cap10 cap8 cap9 cap0 cap7 cap6 cap5 cap3 cap1 cap2 buzzer figure 53 typical application
advanced communications & sensing rev5 4 th august 2011 ? 2011 semtech corp. www.semtech.com 58 SX8662 capacitive button matrix (up to 36) controller with individual led drivers and buzzer output 8 r eferences [1] capacitive touch sensing layout guidelines on w ww.semtech.com
advanced communications & sensing rev5 4 th august 2011 ? 2011 semtech corp. www.semtech.com 59 SX8662 capacitive button matrix (up to 36) controller with individual led drivers and buzzer output 9 p ackaging i nformation 9.1 package outline drawing SX8662 is assembled in a mlpq-w32 package as shown in figure below figure 54 package outline drawing 9.2 land pattern the land pattern of mlpq-w32 package, 5 mm x 5 mm i s shown in figure below. figure 55 land pattern
advanced communications & sensing rev5 4 th august 2011 ? 2011 semtech corp. www.semtech.com 60 SX8662 capacitive button matrix (up to 36) controller with individual led drivers and buzzer output contact information ? semtech 2011 all rights reserved. reproduction in whole or in pa rt is prohibited without the prior written consent of the copyright owner. the information presented in this document does not form part of any quotation or con tract, is believed to be accurate and reliable and may be cha nged without notice. no liability will be accepted by the publisher for any consequence of its use. publicati on thereof does not convey nor imply any license un der patent or other industrial or intelle ctual property rights. semtech assumes no responsib ility or liability whatsoever for any failure or unexpected operation resulting from misuse, neglect improper installatio n, repair or improper handling or unusual physical or electri cal stress including, b ut not limited to, exposure to parameters beyond the specified maximum ratings or operation outside the specified range. semtech products are not designed, intended, author ized or warranted to be suitable for use in life-support applications, devi ces or s ystems or other critical applications. inclusion of semtech products in such applications is understood to be undertaken solely at the customers own risk. sh ould a customer purchase or use semtech products for any such unauthorized application, the custom er shall indemnify and hold semtech and its officer s, employees, subsidiaries, affiliates, and distributo rs harmless against all claims, costs damages and a ttorney fees which could arise. notice: all referenced brands, product names, servi ce names and tra demarks are the property of their respective owners. semtech corporation advanced communications and sensing products divisi on 200 flynn road, camarillo, ca 93012 phone: (805) 498-2111 fax: (805) 498-3804


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